TCP/IP PHY Embedded Chip - WIZnet W5100
From bildr
WIZnet's W5100 is a full-featured, single-chip, Internet-enabled 10/100 Ethernet controller designed for embedded applications where ease of integration, stability, performance, area and system cost control are required. The W5100 has been designed to facilitate easy implementation of Internet connectivity without an OS. The W5100 is IEEE 802.3 10BASE-T and 802.3u 100BASE-TX compliant.The W5100 includes a fully hardwired TCP/IP stack and integrated Ethernet MAC PHY. Hardwired TCP/IP stack supports TCP, UDP, IPv4, ICMP, ARP, IGMP and PPPoE which has been proven in various applications for several years. 16Kbytes internal buffer is included for data transmission. Loaded with features the W5100 is great for a number of applications, including home-network devices, serial-to-ethernet, USB-to-ethernet, security systems, building automation, embedded servers and more!For easy integration, three different interfaces - direct, indirect bus, and SPI - are supported on the MCU side.
Features:
- Support Hardwired TCP/IP ProtocolsĀ : TCP, UDP, ICMP, IPv4 ARP, IGMP, PPPoE, Ethernet
- 10BaseT/100BaseTX Ethernet PHY embedded
- Support Auto Negotiation (Full-duplex and half duplex)
- Support Auto MDI/MDIX
- Support ADSL connection (with support PPPoE Protocol with PAP/CHAP Authentication
- mode)
- Supports 4 independent sockets simultaneously
- Not support IP Fragmentation
- Internal 16Kbytes Memory for Tx/Rx Buffers
- 0.18 Ī¼m CMOS technology
- 3.3V operation with 5V I/O signal tolerance
- Small 80 Pin LQFP Package
- Lead-Free Package
- Support Serial Peripheral Interface(SPI MODE 0)
- Multi-function LED outputs (TX, RX, Full/Half duplex, Collision, Link, Speed)
Availability
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